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Verilog based signal generation and processing system / Soh Wen Yang

By:

Soh Wen Yang [Author]

Material type: Text

Text

TextPublication details: 2011DDC classification:

BEE2011-13

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Holdings ( 1 )

Holdings
Item type	Current library	Home library	Collection	Shelving location	Call number	Status	Date due	Barcode	Item holds
Thesis/Dissertation	FIRST CITY UNIVERSITY COLLEGE	FIRST CITY UNIVERSITY COLLEGE	Thesis/Dissertation	Dissertation	BEE2011-13 (Browse shelf(Opens below))	Not for loan		TD2028

Total holds: 0

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