Digital design and modeling with VHDL and synthesis / / K.C. Chang.
Material type:![Text](/opac-tmpl/lib/famfamfam/BK.png)
- 0818677163
Item type | Current library | Home library | Collection | Shelving location | Call number | Status | Date due | Barcode | Item holds |
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FIRST CITY UNIVERSITY COLLEGE | FIRST CITY UNIVERSITY COLLEGE | Open Collection | FCUC Library | 621.392 CHA (Browse shelf(Opens below)) | Available | 00005585 |
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621.392 ASH The system designer's guide to VHDL-AMS : | 621.392 BHA A guide to VHDL syntax : | 621.392 BHA A VHDL primer / | 621.392 CHA Digital design and modeling with VHDL and synthesis / | 621.392 CIL Starter's guide to Verilog 2001 / | 621.392 CIL Advanced digital design with the Verilog HDL / | 621.392 CIL Advanced digital design with the Verilog HDL / |
Includes bibliographical references.
Combines VHDL and synthesis in an easy-to-follow step-by-step sequence. This approach addresses common mistakes and hard-to-understand concepts in a way that eases learning. Digital Design and Modeling with VHDL and Synthesis introduces VHDL with closely related practical design examples, simulation waveforms, and schematics so you can better understand their correspondence and relationship. This book is the result of the K.C. Chang's extensive experience in both design and teaching. Many of the design techniques and design considerations, illustrated throughout the chapters, are examples of real designs.
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