Timing verification of application-specific integrated circuits (ASICs) / (Record no. 16492)
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000 -LEADER | |
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fixed length control field | 01650cam a2200265 a 4500 |
001 - CONTROL NUMBER | |
control field | vtls000002689 |
003 - CONTROL NUMBER IDENTIFIER | |
control field | MY-PjKIC |
005 - DATE AND TIME OF LATEST TRANSACTION | |
control field | 20200206152434.0 |
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
fixed length control field | 100211t1999 njua b 001 0 eng d |
020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
International Standard Book Number | 0137943482 (case) |
035 ## - SYSTEM CONTROL NUMBER | |
System control number | 0137943482 |
039 #9 - LEVEL OF BIBLIOGRAPHIC CONTROL AND CODING DETAIL [OBSOLETE] | |
Level of rules in bibliographic description | 201205211904 |
Level of effort used to assign nonsubject heading access points | rabihah |
Level of effort used to assign subject headings | 201002111612 |
Level of effort used to assign classification | VLOAD |
-- | 201002111408 |
-- | VLOAD |
090 ## - LOCALLY ASSIGNED LC-TYPE CALL NUMBER (OCLC); LOCAL CALL NUMBER (RLIN) | |
Classification number (OCLC) (R) ; Classification number, CALL (RLIN) (NR) | 621.395 NEK |
100 1# - MAIN ENTRY--PERSONAL NAME | |
Personal name | Nekoogar, Farzad. |
245 10 - TITLE STATEMENT | |
Title | Timing verification of application-specific integrated circuits (ASICs) / |
Statement of responsibility, etc. | Farzad Nekoogar. |
260 ## - PUBLICATION, DISTRIBUTION, ETC. | |
Place of publication, distribution, etc. | Upper Saddle River, NJ : |
Name of publisher, distributor, etc. | Prentice-Hall PTR, |
Date of publication, distribution, etc. | c1999. |
300 ## - PHYSICAL DESCRIPTION | |
Extent | 179 p. : |
Other physical details | ill. ; |
Dimensions | 24 cm. |
504 ## - BIBLIOGRAPHY, ETC. NOTE | |
Bibliography, etc. note | Includes bibliographical references and index. |
520 ## - SUMMARY, ETC. | |
Summary, etc. | "In today's high-speed designs, timing analysis is critical to success. This is the first book to focus exclusively on these crucial timing issues, with special emphasis on timing verification of ASICs." "Timing Verification of Application-Specific Integrated Circuits (ASICs) highlights principles and techniques over specific tools. This method makes the materials applicable to a variety of logic design approaches, especially in the field of deep submicron digital design." "Numerous design examples and Verilog codes offer practical illustrations of all the concepts. Timing Verification of Application-Specific Integrated Circuits (ASICs) is a must for all logic designers concerned with the accuracy of timing and clock issues."--BOOK JACKET. |
591 ## - | |
-- | Globe Enterprise |
592 ## - | |
-- | D/O 520A |
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
Topical term or geographic name entry element | Application specific integrated circuits. |
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
Topical term or geographic name entry element | Integrated circuits |
General subdivision | Verification. |
Withdrawn status | Lost status | Damaged status | Not for loan | Collection code | Home library | Current library | Shelving location | Cost, normal purchase price | Total Checkouts | Full call number | Barcode | Date last seen | Koha item type |
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Open Collection | FIRST CITY UNIVERSITY COLLEGE | FIRST CITY UNIVERSITY COLLEGE | FCUC Library | 252.00 | 621.395 NEK | 00009022 | 03/02/2021 | Open Collection |