Arithmetic built-in-self-test for embedded systems /
Janusz Rajski, Jerzy Tyszer.
- Upper Saddle River, NJ : Prentice-Hall PTR, c1998.
- xii, 268 p. : ill.
Includes bibliographical references and index.
Arithmetic Built-In Self-Test for Embedded Systems offers a thorough treatment of the important issues in software-based built-in self-test for systems with embedded processors. Fundamental concepts are illustrated with practical scenarios for test generation, test application, and test response compaction. Arithmetic Built-In Self-Test for Embedded Systems uses an approach to cutting-edge technology that will be of interest to hardware and embedded system designers, test and design engineers, and researchers working on IC/core testing. It is also appropriate for graduate-level design courses. An introductory chapter provides a comprehensive tutorial covering the most relevant DFT and BIST techniques.