Rajski, Janusz. <br/><br/>
Arithmetic built-in-self-test for embedded systems / 
Janusz Rajski, Jerzy Tyszer. 
 - Upper Saddle River, NJ :  Prentice-Hall PTR,  c1998. 
 - xii, 268 p. :  ill. 
<br/><br/>Includes bibliographical references and index. 
<br/><br/> Arithmetic Built-In Self-Test for Embedded Systems offers a thorough treatment of the important issues in software-based built-in self-test for systems with embedded processors. Fundamental concepts are illustrated with practical scenarios for test generation, test application, and test response compaction. Arithmetic Built-In Self-Test for Embedded Systems uses an approach to cutting-edge technology that will be of interest to hardware and embedded system designers, test and design engineers, and researchers working on IC/core testing. It is also appropriate for graduate-level design courses. An introductory chapter provides a comprehensive tutorial covering the most relevant DFT and BIST techniques. 
<br/><br/><label>ISBN: </label>0137564384 / 9780137564385 
<br/><br/><label>Subjects--Topical Terms: </label><br/>Embedded computer systems--Testing.<br/>Computer Firmware.
<br/><br/><label>LC Class. No.: </label>TK7895.E42R35 1998 
<br/><br/><label>Dewey Class. No.: </label>621.39/5/0287 RAJ 1998